Acer Aspire S7-391 Wistron Storm, Schematy
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//-->54321DStormUMA Schematics DocumentChief RiverIntel PCHDCC8G:FOR 8G DIMMBBSTORMAWistron Corporation21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.TitleACover PageSizeA3Document NumberMonday, June 25, 2012Revhobi-elektronika.net5432StormSheet1of1-1102Date:54321SYSTEM DC/DCCPU DC/DCNCP6131S52MNRINPUTSDCBATOUTProject code : 91.4WE01.001PCB P/N: 48.4WE05.0SARevision: 12223-1DStorm Block DiagramIntel CPUIVY Bridge2C BGA 1023 Pin ULVDDRIII 1066/1333 Channel AAPL5916KAIINPUTS1D05V_PWR0D85V_S04842~43OUTPUTSOUTPUTSVCC_CORESYSTEM DC/DCUP6128PQDDINPUTSDDR3L 1333Memory Down 114DDR3L 1333Memory Down2DCBATOUT45OUTPUTS1D05V_VTTDSYSTEM DC/DCUP6183PQAG4113'LCD49eDPDDRIII 1066/1333 Channel BINPUTS15OUTPUTS5V_AUX_S53D3V_AUX_S55V_S53D3V_S5DCBATOUT4,5,6,7,8,9,10,11,12,13SYSTEM DC/DCUP6165BQKFINPUTSDCBATOUT46OUTPUTS1D5V_S30D75V_S0DDR_VREF_S3FDICDMIx4SYSTEM DC/DCNCP5911MNTBGINPUTSDCBATOUT44COUTPUTSVCC_GFXCORE_PWRPCI-E X1LGA WLAN+BTMD22265VGART8208BGQWINPUTSDCBATOUT92Micro HDMI51HDMIIntelUSB 2.0OUTPUTSVGA_COREPCH HM776 USB 2.0/1.1 portsUSB 2.02 USB 3.0 portsETHERNET (10/100/1000Mb)High Definition AudioSATA ports (4)PCIE ports (4)PCI-E2.0 X4Display PortCactus-Ridge75~79TI CHARGERBQ24745RHDRINPUTSDCBATOUT2640OUTPUTSBT+Micro SDCardReaderRTS513832SYSTEM DC/DCRT902547INPUTS3D3V_S0OUTPUTS1D8V_S0BUSB 3.0 Port *2BUSB 3.062LPC I/FACPI 1.1SATA3 x2mSATA5626SYSTEM DC/DCRT9025-25PSPINPUTS1D5V_S34993OUTPUTS1V_VGA_S01D8V_VGA_S017,18,19,20,21,22,23,24,25,26USB 2.0Touch Screen3D3V_S5AZALIASwitchesINPUTSSPILPC Bus1D5V_S33D3V_S0OUTPUTS1D5V_VGA_S03D3V_VGA_S0Internal Digital MICCombo jackAzaliaCODECALC27129Flash ROM2MB60Flash ROM4MB60SPISMBusSMBusLPC debug port71PCB LAYERL1:TopL2:VCCL3:SignalL4:VCCL5:SignalSTORMKBCITE IT8518VG27Fan28SMBusL6:SignalL7:GNDL8:SignalL9:GNDL10:BottomAAWistron Corporation21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.2CH SPEAKERKeyboard backlightMAX14521E2569LightTouchInt.Sensorhobi-elektronika.netPadKB4969693ThermalNCT 77182528TitleBlock DiagramSizeA3Date:2Document NumberMonday, June 25, 2012RevStormSheet1-12of10254PCH StrappingNameSPKRABHuron River Schematic Checklist Rev.0_7Schematics NotesProcessor StrappingPin NameStrap DescriptionCFG[2]PCI-Express StaticLane Reversal1:0:CDHuron River Schematic Checklist Rev.0_7DefaultValueEReboot option at power-upDefault Mode:Internal weak Pull-down.No Reboot Mode with TCO Disabled:Connect to Vcc3_3 with 8.2-k- 10-k weak pull-up resistor.Weak internal pull-up. Leave as "No Connect".GNT[3:0]# functionality is not available on Mobile.Mobile: Used as GPIO onlyPull-up resistors are not required on these signals.If pull-ups are used, they should be tied to the Vcc3_3power rail.Enable Danbury:Connect to Vcc3_3 with 8.2-k? weak pull-up resistor.Configuration (Default value for each bit is1 unless specified otherwise)Normal Operation.Lane Numbers Reversed15 -> 0, 14 -> 1, ...1INIT3_3V#4GNT3#/GPIO55GNT2#/GPIO53GNT1#/GPIO51CFG[4]Disabled - No Physical Display Port attached to1:Embedded DisplayPort.Enabled - An external Display Port device is0:connectd to the EMBEDDED display PortPCI-ExpressPort BifurcationStraps11 : x16 - Device 1 functions 1 and 2 disabled10 : x8, x8 - Device 1 function 1 enabled ;function 2 disabled01 : Reserved - (Device 1 function 1 disabled ;function 2 enabled)00 : x8, x4, x4 - Device 1 functions 1 and 2enabled4CFG[6:5]SPI_MOSILeft floating, no pull-down required.Disable Danbury:11NV_ALEEnable Danbury:Connect to +NVRAM_VCCQ with 8.2-kohmweak pull-up resistor [CRB has it pulled upwith 1-kohm no-stuff resistor]Leave floating (internal pull-down)Disable Danbury:CFG[7]PEG DEFER TRAINING1:PEG Train immediately following xxRESETB de assertion10:PEG Wait for BIOS for trainingNC_CLEDMI termination voltage. Weak internal pull-up. Do not pull low.Low (0) - Flash Descriptor Security will be overridden. Also,when this signals is sampled on the rising edge of PWROKthen it will also disable Intel ME and its features.High (1) - Security measure defined in the Flash Descriptor will be enabled.Platform design should provide appropriate pull-up or pull-down depending onthe desired settings. If a jumper option is used to tie this signal to GND asrequired by the functional strap, the signal should be pulled low through a weakpull-down in order to avoid asserting HDA_DOCK_EN# inadvertently.Note: CRB recommends 1-kohm pull-down for FD Override. There is an internalpull-up of 20 kohm for DA_DOCK_EN# which is only enabled at boot/reset forstrapping functions.Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.Low (1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with noconfidentiality High (1) - Intel ME Crypto Transport Layer Security (TLS) ciphersuite with confidentialityNote : This is an un-muxed signal.This signal has a weak internal pull-down of 20 kohm which is enabled when PWROK is low.Sampled at rising edge of RSMRST#.CRB has a 1-kohm pull-up on this signal to +3.3VA rail.GPIO8 on PCH is the Integrated Clock Enable strap and is required to be pulled-downusing a 1k +/- 5% resistor. When this signal is sampled high at the rising edge ofRSMRST#, Integrated Clocking is enabled, When sampled low, Buffer Through Mode isenabled.Default = Do not connect (floating)High(1) = Enables the internal VccVRM to have a clean supply foranalog rails. No need to use on-board filter circuit.Low (0) = Disables the VccVRM. Need to use on-board filtercircuits for analog rails.5V_USBX_S31D5V_S3DDR_VREF_S35V1.5V0.75VS3Voltage RailsPOWER PLANE5V_S03D3V_S01D8V_S01D5V_S01D05V_VTT0D85V_S00D75V_S0VCC_COREVCC_GFXCORE1D8V_VGA_S03D3V_VGA_S01V_VGA_S0VOLTAGEACTIVE IN5V3.3V1.8V1.5V1.05V0.95 - 0.85V0.75V0.35V to 1.5V0.4 to 1.25V1.8V3.3V1VDESCRIPTION3HAD_DOCK_EN#/GPIO[33]3S0CPU Core RailGraphics Core RailHDA_SDOHDA_SYNCGPIO15BT+DCBATOUT5V_S55V_AUX_S53D3V_S53D3V_AUX_S53D3V_LAN_S56V-14.1V6V-14.1V5V5V3.3V3.3V3.3VAC Brick Mode onlyAll S statesGPIO8WOL_ENLegacy WOL2GPIO273D3V_AUX_KBC3.3VDSW, SxON for supporting Deep Sleep states23D3V_AUX_S53.3VG3, SxPowered by Li Coin Cell in G3and +V3ALW in SxUSB TablePCIE RoutingSMBus ADDRESSESI2C / SMBus AddressesDeviceRef DesHURON RIVER ORBAddressHexBusLANE1LANE2LANE31N/AN/AN/AWLANThunderboltThunderboltThunderboltThunderboltPair1234512SATA TableSATADevicemSATA1mSATA2N/AN/AN/AN/A3456789101112EC SMBus 1BatteryCHARGEREC SMBus 2PCHeDPBAT_SCL/BAT_SDABAT_SCL/BAT_SDABAT_SCL/BAT_SDALANE4LANE5LANE6LANE7LANE8SML1_CLK/SML1_DATASML1_CLK/SML1_DATASML1_CLK/SML1_DATASTORM1PCH SMBusSO-DIMMA (SPD)SO-DIMMB (SPD)Digital PotG-SensorMINIhobi-elektronika.netPCH_SMBDATA/PCH_SMBCLKPCH_SMBDATA/PCH_SMBCLKPCH_SMBDATA/PCH_SMBCLKPCH_SMBDATA/PCH_SMBCLKTitlePCH_SMBDATA/PCH_SMBCLKPCH_SMBDATA/PCH_SMBCLKSizeA3Date:Wistron Corporation21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.Table of ContentDocument NumberRevStormMonday, June 25, 2012-1Sheet3of102543211D05V_VTTCPU1A1 OF 9R401PEG_IRCOMP_RD19DMI_TXN[3:0]DMI_TXN0DMI_TXN1DMI_TXN2DMI_TXN3DMI_TXP0DMI_TXP1DMI_TXP2DMI_TXP3DMI_RXN0DMI_RXN1DMI_RXN2DMI_RXN3DMI_RXP0DMI_RXP1DMI_RXP2DMI_RXP3M2P6P1P10N3P7P3P11K1M8N4R2K3M7P4T319DMI_TXP[3:0]DMI_RX#0DMI_RX#1DMI_RX#2DMI_RX#3DMI_RX0DMI_RX1DMI_RX2DMI_RX3DMI_TX#0DMI_TX#1DMI_TX#2DMI_TX#3DMI_TX0DMI_TX1DMI_TX2DMI_TX3PEG_ICOMPIPEG_ICOMPOPEG_RCOMPOPEG_RX#0PEG_RX#1PEG_RX#2PEG_RX#3PEG_RX#4PEG_RX#5PEG_RX#6PEG_RX#7PEG_RX#8PEG_RX#9PEG_RX#10PEG_RX#11PEG_RX#12PEG_RX#13PEG_RX#14PEG_RX#15PEG_RX0PEG_RX1PEG_RX2PEG_RX3PEG_RX4PEG_RX5PEG_RX6PEG_RX7PEG_RX8PEG_RX9PEG_RX10PEG_RX11PEG_RX12PEG_RX13PEG_RX14PEG_RX15PEG_TX#0PEG_TX#1PEG_TX#2PEG_TX#3PEG_TX#4PEG_TX#5PEG_TX#6PEG_TX#7PEG_TX#8PEG_TX#9PEG_TX#10PEG_TX#11PEG_TX#12PEG_TX#13PEG_TX#14PEG_TX#15PEG_TX0PEG_TX1PEG_TX2PEG_TX3PEG_TX4PEG_TX5PEG_TX6PEG_TX7PEG_TX8PEG_TX9PEG_TX10PEG_TX11PEG_TX12PEG_TX13PEG_TX14PEG_TX15G3G1G4H22J21B22D21A19D17B14D13A11B10G8A8B6H8E5K7K22K19C21D19C19D16C13D12C11C9F8C8C5H6F6K6G22C23D23F21H19C17K15F17F14A15J14H13M10F10D9J4F22A23D24E21G19B18K17G17E14C15K13G13K10G10D8K41224D9R1F-GPDDMIDMI19 DMI_RXN[3:0]19DMI_RXP[3:0]19 FDI_TXN[7:0]19FDI_TXP[7:0]FDI_TXP0FDI_TXP1FDI_TXP2FDI_TXP3FDI_TXP4FDI_TXP5FDI_TXP6FDI_TXP7U6W10W3AA7W7T4AA3AC8AA11AC12U11AA10AG8FDI0_TX0FDI0_TX1FDI0_TX2FDI0_TX3FDI1_TX0FDI1_TX1FDI1_TX2FDI1_TX3FDI0_FSYNCFDI1_FSYNCFDI_INTFDI0_LSYNCFDI1_LSYNC1919191919FDI_FSYNC0FDI_FSYNC1FDI_INTFDI_LSYNC0FDI_LSYNC11D05V_VTT24D9R1F-GP R4021249 CPU_EDP_HPD#DP_COMPAF3AD2AG11AG4AF4AC3AC4AE11AE7AC1AA4AE10AE6EDP_COMPIOEDP_ICOMPOEDP_HPD#EDP_AUX#EDP_AUXBImpedance:85 ohmSignal Routing Guideline:EDP_ICOMPO keep W/S=12/15 mils and routinglength less than 500 mils.EDP_COMPIO keep W/S=4/15 mils and routinglength less than 500 mils.PCI EXPRESS -- GRAPHICSCFDI_TXN0FDI_TXN1FDI_TXN2FDI_TXN3FDI_TXN4FDI_TXN5FDI_TXN6FDI_TXN7U7W11W1AA6W6V4Y2AC9FDI0_TX#0FDI0_TX#1FDI0_TX#2FDI0_TX#3FDI1_TX#0FDI1_TX#1FDI1_TX#2FDI1_TX#3CIntel(R) FDIIntel(R) FDI49 CPU_EDP_AUX#49 CPU_EDP_AUX49 CPU_EDP_DATA0#49 CPU_EDP_DATA1#BeDPEDP_TX#0EDP_TX#1EDP_TX#2EDP_TX#3EDP_TX0EDP_TX1EDP_TX2EDP_TX3IVY-BRIDGE-GP-NF49 CPU_EDP_DATA049 CPU_EDP_DATA171.00IVY.A0U1D05V_VTT1R4041KR1J-GP2CPU_EDP_HPD#STORMAAWistron Corporation21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.Titlehobi-elektronika.netSizeA3Date:Document NumberMonday, June 25, 2012Sheet4ofRev10254CPU1B32 OF92BCLKBCLK#J3H2AG3AG1CLK_EXP_PCLK_EXP_N20201D05V_VTTR50122 H_SNB_IVB#F49C57PROC_SELECT#PROC_DETECT#CLOCKS1Disabling Guidelines:If motherboard only supports external graphics or without eDP:Connect DPLL_REF_SSCLK on Processor to GND through 1K +/- 5%resistor.Connect DPLL_REF_SSCLK# on Processor to VCCP through 1K +/- 5%resistorpower (~15 mW) may be wasted.MISCMISC1262R1J-GPH_PROCHOT#DPLL_REF_CLKDPLL_REF_CLK#CLK_DP_P 20CLK_DP_N 201D2C501SC47P50V2JN-3GPC49DSM_DRAMRST# 37CLK_EXP_PCLK_EXP_NCLK_DP_PCATERR#1111TP501TP502TP503TP504-SDTHERMALTHERMAL22,27H_PECIR504A48PECISM_DRAMRST#SM_RCOMP0SM_RCOMP1SM_RCOMP2AT30BF44BE43BG432R50214K99R2F-L-GPSM_RCOMP_0 R5061SM_RCOMP_1 R5071SM_RCOMP_2 R508127 H_PROCHOT#1256R1J-GPH_PROCHOT#_RDDR3MISCC45PROCHOT#2140R2F-GP225D5R2F-GP2200R1F-GPCLK_DP_NFor SIV,please near to CPUN53N55L56L55J58M60L5922,36 H_THERMTRIP#D45THERMTRIP#PRDY#PREQ#TCKTMSTRST#PWR MANAGEMENTPWR MANAGEMENTXDP_TRST#XDP_TDOXDP_TDOXDP_TRST#1D05V_VTT19H_PM_SYNCC48JTAG & BPMPM_SYNCTDITDO2134RN502SRN51J-GP22,97 H_CPUPW RGDB46R503UNCOREPWRGOODC37 VDDPW RGOOD2110KR2J-L-GPBE45SM_DRAMPWROKDBR#BPM#0BPM#1BPM#2BPM#3BPM#4BPM#5BPM#6BPM#7K58G58E55E59G55G59H60J59J61XDP_DBRESET#CBUF_CPU_RST#D44RESET#IVY-BRIDGE-GP-NF3D3V_S0RN505XDP_DBRESET#18,27,36,65,71,75,81,97PLT_RST#1243BUF_CPU_RST#SRN1KJ-11-GP-U1R505499R2F-2-GPB2BASTORMAWistron Corporation21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.Titlehobi-elektronika.netSizeA3Date:Document NumberMonday, June 25, 2012Sheet5ofRev102
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